|Opcode/Instruction||Op/En||64/32-bit Mode||CPUID Feature Flag||Description|
|F3 0F 38 DE !(11):rrr:bbb AESENC256KL xmm, m512||A||V/V||AESKLE||Encrypt xmm using 256-bit AES key indicated by han-dle at m512 and store result in xmm.|
|Op/En||Tuple||Operand 1||Operand 2||Operand 3||Operand 4|
|A||NA||ModRM:reg (r, w)||ModRM:r/m (r)||NA||NA|
The AESENC256KL1 instruction performs 14 rounds of AES to encrypt the first operand using the 256-bit key indi-cated by the handle from the second operand. It stores the result in the first operand if the operation succeeds (e.g., does not run into a handle violation failure).
Handle := UnalignedLoad of 512 bit (SRC); // Load is not guaranteed to be atomic. Illegal Handle = ( HandleReservedBitSet (Handle) || (Handle AND (CPL > 0)) || Handle  || HandleKeyType (Handle) != HANDLE_KEY_TYPE_AES256 ); IF (Illegal Handle) THEN RFLAGS.ZF := 1; ELSE (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate512 (Handle[511:0], IWKey); IF (Authentic == 0) THEN RFLAGS.ZF := 1; ELSE DEST := AES256Encrypt (DEST, UnwrappedKey) ; RFLAGS.ZF := 0; FI; FI; RFLAGS.OF, SF, AF, PF, CF := 0;
ZF is set to 0 if the operation succeeded and set to 1 if the operation failed due to a handle violation. The other arithmetic flags (OF, SF, AF, PF, CF) are cleared to 0.
unsigned char _mm_aesenc256kl_u8(__m128i* odata, __m128i idata, const void* h);
Further details on Key Locker and usage of this instruction can be found here:
If the LOCK prefix is used.
If CPUID.07H:ECX.KL [bit 23] = 0.
If CR4.KL = 0.
If CPUID.19H:EBX.AESKLE [bit 0] = 0.
If CR0.EM = 1.
If CR4.OSFXSR = 0.
If CR0.TS = 1.
If a page fault occurs.
If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector.
If the memory address is in a non-canonical form.
If a memory operand effective address is outside the SS segment limit.
If a memory address referencing the SS segment is in a non-canonical form.