BNDCL—Check Lower Bound

Opcode/

Op/En

64/32

CPUID

Description

Instruction bit Mode Support Feature Flag
F3 0F 1A /r BNDCL bnd, r/m32 RM NE/V MPX Generate a #BR if the address in r/m32 is lower than the lower bound in bnd.LB.
F3 0F 1A /r BNDCL bnd, r/m64 RM V/NE MPX Generate a #BR if the address in r/m64 is lower than the lower bound in bnd.LB.

Instruction Operand Encoding

Op/En Operand 1 Operand 2 Operand 3
RM ModRM:reg (w) ModRM:r/m (r) NA

Description

Compare the address in the second operand with the lower bound in bnd. The second operand can be either a register or memory operand. If the address is lower than the lower bound in bnd.LB, it will set BNDSTATUS to 01H and signal a #BR exception.

This instruction does not cause any memory access, and does not read or write any flags.

Operation

BNDCL BND, reg

IF reg < BND.LB Then
    BNDSTATUS := 01H;
    #BR;
FI;

BNDCL BND, mem

TEMP := LEA(mem);
IF TEMP < BND.LB Then
    BNDSTATUS := 01H;
    #BR;
FI;

Intel C/C++ Compiler Intrinsic Equivalent

BNDCL void _bnd_chk_ptr_lbounds(const void *q)

Flags Affected

None

Protected Mode Exceptions

#BR If lower bound check fails.
#UD

If the LOCK prefix is used.

If ModRM.r/m encodes BND4-BND7 when Intel MPX is enabled.

If 67H prefix is not used and CS.D=0.

If 67H prefix is used and CS.D=1.

Real-Address Mode Exceptions

#BR If lower bound check fails.
#UD

If the LOCK prefix is used.

If ModRM.r/m encodes BND4-BND7 when Intel MPX is enabled.

If 16-bit addressing is used.

Virtual-8086 Mode Exceptions

#BR If lower bound check fails.
#UD

If the LOCK prefix is used.

If ModRM.r/m encodes BND4-BND7 when Intel MPX is enabled.

If 16-bit addressing is used.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

64-Bit Mode Exceptions

#UD If ModRM.r/m and REX encodes BND4-BND15 when Intel MPX is enabled.

Same exceptions as in protected mode.